RZ/T2M RZ/T2L SIL3 safety architecture with cross-monitoring

SIL3 safety cross-monitoring architecture with two CPUs, one simple idea:

RZ/T2L-A and RZ/T2L-B independently execute the safety process and continuously monitor each other. If either CPU detects that the other CPU is late, inconsistent, or not executing correctly, the system transitions to the safe state.

Current model:

Open

Improved model: TBD

TBD