Reset by Illegal Memory Access Detection

RL78 family has a reset function triggered by detecting illegal memory access. In addition to the usual settings, there is a link between the activation of the watchdog timer (WDT) and the reset. This information is crucial, and awareness of such detail can help to prevent unexpected issues.

Important Information:

Illegal Memory Access Reset does not occur when the watchdog timer is disabled in the RL78 family.

Supplementary explanation:

IAWCTL Register:

The IAWCTL register is used to control the detection of illegal memory access. It is an 8 bit register and the value of this register following a reset is 00H.

Bit 7 (IAWEN) of IAWCTL register control illegal memory access. For example, IAWEN = 1 enables illegal memory access detection, while IAWEN = 0 disables it. It should be noted that writing zero to this bit after writing one has no effect The “after reset” value for this bit is zero and disabled by default configuration in smart configurator tool under “r_bsp”.

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Relation Between IAWEN and Watchdog Timer:

According to RL78 HWUM’s Safety Functions section, when WDTON = 1 (watchdog timer operation enable) is set in the option byte(000C0H), the illicit memory access detection function is enabled even if IAWEN = 0 i.e. when watchdog timer is enabled by user application, illegal memory access detection function also gets activated even though the IAWEN bit is configured as zero.                                   

Conclusion:

In general, if user wants to enable illegal memory access detection, it should configure IAWEN = 1. However, if the watchdog timer is enabled, this is a special case where an illegal memory access reset occurs even if IAWEN = 0. 

Note:   In some RL78 family devices such as G10/G15/G16), either IAWEN bit or IAWCTL register is not available.